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Welcome in..... SRGOC
20 years of Imparting Excellent
Technical Education
Welcome in..... SRGOC
20 years of Imparting Excellent
Technical Education
   

Profile

Shweta Agrawal

Qualification :M.Tech.

Details of Educational Qualification:

Course Specialization Group College Name/University Year of Passing
M.Tech. Very Large Scale Integration (VLSI) Electronics and Communication Engineering SRCEM , Banmore Gwalior 2014
B.E. Electronics and Communication Engineering Electronics and Communication Engineering NRIITM Gwalior 2007

My Publications

S.No Title of the Paper Full Details of Journal Name / Conference Name, Volume number, page number, Date
1 Implementation of Vedic Multiplier on Circuit Level. International Journal of Advanced Engineering Research and Science (IJAERS) Vol-1, Issue-6, pp.51-53 Nov. - 2014
2 Metaphorical Study Of Reversible Logic Gate International Journal of Innovative Research in Computer and Communication Engineering, Volume 1, Issue 4, June 2013
3 A Review of a Vedic Multiplier. International Journal of Scientific and Engineering Research”, Vol. Dec-2014.
4 An Analysis and effects of effects of changes in supply voltage on performance parameter of inverter based 10-stage delay line.

International Journal of Electrical and Electronics Research (FOREX- IJEER), Vol.4, Issue 4, December 2016.

5

Design and implementation of low Complexity sharpening filter for image scalar applications

International Journal of Advanced and Innovative Research (IJAIR), vol. 5, issue 04, pp. 427-431, April 2016.
6

Design of Efficient 32bits BCD Adders in Quantum-Dot Cellular Automata.

International Journal for Research in Applied Science & Engineering Technology (IJRASET) Vol. 6, Issue II, Feb 2018.
7

Review On High Performance Median Filter For Salt And Pepper Noise Removal

IJAIR, Vol. No. 5 Issue: 4, pp.243-247, April 2016.
8

A Novel Low Complexity Energy Efficient DCT Architectures

International Journal of Advanced and Innovative Research (2278-7844) / # 16 / Volume 6, Issue 1.

9

Process Variation: Performance Degradation Analysis Each New Technology

International Journal of Advanced   and Innovative Research (IJAIR), Vo. 5, Issue 6, pp. 1-7, June 2016.
10

Process Variation Mitigation via Body Bias Technique

International Journal of Innovative Research in Science, Engineering and Technology (IJIRSET), Vol. 5, Issue 5, pp. 9042-9053, May 2016
11

Design and implementation of low complexity sharpening filter for image scalar applications 

International Journal of Advanced and Innovative Research (IJAIR), vol. 5, issue 04, pp. 427-431, April 2016.
12

VLSI Implementation of Energy Efficient Gaussian Filter: A Survey 

International Journal of Advanced and Innovative Research (IJAIR), vol. 5, issue 5, pp. 286-291, May 2016.

13

Design and Implementation of Novel Energy Efficient Gaussian Filter

International Journal of Innovative Research in Science, Engineering and Technology (IJIRSET), vol. 5, issue 5,pp. 9010-9019, May 2016.
14

Energy Efficient DCT Architecturesfor Image Processing Applications: A Review

International Journal of Advanced and Innovative Research (2278-7844) / # 9 / Volume 6, Issue 1.
15

Design and VLSI Implementation of High Performance Median Filter

IJAIR, Vol. No. 5 Issue: 4, pp.383-388, April 2016.

16

A Novel CMOS Delay Line Circuit Using Lector Technique with Minimum Power Consumption

International Journal of Innovative Research in Engineering and Applied Sciences (IJIREAS), Vol 3, Issue 1, February 2017.
17

A Novel Low Complexity Histogram Algorithm for High Performance Image Processing Applications

International Research Journal of Engineering and Technology (IRJET), Vol. 4, Issue 1, pp.1398-1403, January 2017.

18

New High Performance Histogram Design

International Journal for Research in Applied Science & Engineering Technology (IJRASET), Vol. 5, Issue 1, pp. 476-482, January 2017
19

Review Paper on Binary Coded Decimal Adder

International Journal for Science and Advance Research In Technology (IJSART) , Vol. 4 ,Issue 2 – Feb 2018.

At UG  Level

Digital Electronics

Microprocessor and Microcontroller and its interface

Data Communication

VLSI circuits & systems

Computer Network

At PG  Level

Advance logic Design

CMOS VLSI design

Embedded Microcontroller Programming

Testing and Testability

Embedded Computing System Design

System on Chip 

M.Tech (VLSI) Thesis Guided            : 15 Nos.